[Autogenerated] our next topic is looking at kernel mode,
APIs used by the kernel and device drivers as they relate to memory.
Before we go and talk about that?
We have to discuss a concept called Ir que el,
which is generally beyond the scope of this course,
but has something to do with the kernel related memory.
So I'd like to do a brief overview of what interrupt request level is,
what is an I R Q L.
You can think of that as a register of a processor.
So each processor has its own R Q L.
Whether it's actually implemented as a register in the processor
or just simulated in software is the material.
The CPU always tries to run the highest r KL code possible
and the most common case where our key changes are required
is when interrupt comes in.
When interrupt comes in from a hardware interrupt hardware device,
then the CPU is going to raise its R Q L to whatever
the arcade of the interrupted.
The interrupt also has an R K L,
which you can think of as its priority and then it's going
to run the interrupt service routine.
Once the interrupt service routine is done,
the interrupt is dismissed, the article would drop back to its original level,
which is normally zero.
In fact, user mode code can only run with Rko zero.
And that's why if you look at using more documentation,
never find the term archaic at all because in user
mode can always be only be zero, there's no way to change it in kernel mode,
most of Colonel called the device to record 10 but not all the time.
In some cases it transit Archaea which is higher than zero.
So what does that really mean?
I mean, so the archaea might be higher than zero,
how does that affect any kind of execution?
So here are the basic rules when the r k L is less than to all the
rules we're familiar with in terms of threats,
scheduling, all that stuff works as expected.
Everything we talked about in terms of memory up until now,
such as handling page fault is working as we discussed.
However, when the processors are key L is two or higher known as dispatch level,
the world changes at least on that processor accessing any kind of page
memory caused causes the blue screen which means that if you try to
access memory which happens to be paged out,
you get the blue screen,
the current threat doesn't have to worry about context switches,
it has an infinite quantum at least in theory and
there's no waiting allowed at all from, from that kind of context,
when the article is two or higher,
all that is based on the fact that the scheduler the colonel scheduler runs,
you can think of that as it runs at article number two,
which means that you cannot interrupt such a code.
That article which is two or lower.
So essentially when the interrupt service routine runs or
any kind of code runs while the article,
the processor is two or higher,
the scheduler cannot interfere so it cannot perform any context switch.
And page faults are handled by running some kind of code
that needs to read data from the disk, perhaps,
and that causes the blue screen because no context switching is allowed.
No waiting is allowed for exactly the same reason.
So what does that have to do with kernel memory in the first place?
We'll see that in the next clip.