[Autogenerated] Finally we get to the X- 64 virtual other translations.
It happens today for 64-bit systems.
The basic ideas are the same,
it's just the same mechanism is extended to cover very
large addresses and remember that we have only 48 bits
that are using today's systems.
And so we are looking only at the 48 bits which are the extreme 24 bits on
one side and 24 bits on the other side of the address where the Middle 16
bits don't really matter for address translation.
So I'm not showing that,
but we're just looking at these 48 bits and so the same ideas apply.
But now we have more levels of indirection and the highest data structure
here is known as page map level four intern at some point decided to ditch
these names like page directory table pointers and things like that and
decided to start using numbers because obviously these kinds of naming
does not scale very well.
So we have again the page map level four,
that would be the data structure is always in physical memory and
it's pointing to buy Cr three when translation is happening based on
this process that is currently in scope,
that means one of its thread is executing and of course the k
process structure holds onto this information so that when the
context which occurs between threats, if a different process has to be present.
Now then that data,
that address can be extracted from that process and again you have
these nine beat schemes because every entry is eight bytes in size
and it wasn't increased until now.
It hasn't increased yet and it's not really needed a dis
pointer enough beat there to go around.
So again we have the first nine beats the upper nine beats
selecting particular PFM and that PFM points to one of the
possible 512 page directory pointer tables.
So we have one of those being used right now.
And again,
we have more nine beats coming from the page directory pointer pointing to a
particular PFM that points to a particular page Directory.
That again could be one of 512 possible page directories and
same thing continues with page tables by selecting a particular
page table and finally the PFm here, which is the P.
T.
The page table entry will point the beginning of a page as
usual where the offset will serve as the offset to that
particular bite within that page.
So exactly the same ideas as before simply extended.
So why is it called Page map?
Level four?
What you notice?
That's the fourth level here, that's level one,
level two, Level three and level four.
And another thing we can see here is that you might recall from the
beginning of this course when we talked about the fact that Intel
supports now 57 beats in virtual address space which windows currently
doesn't use but we'll use in the future.
You might be wondering where that number 56 seven is coming from.
So now it's perhaps more obvious because if we add 9 to 48 we get to 57
essentially we have another full layer of translation.
In fact in that case the most single tone entity there is
known as page map level five or p m Five if you look that
up in Intel's documentation.
So that's the idea is the same thing just extended by yet another full
layer of translation which consists of more nine bits more.
And this is why we get to 57.
This is how that number came to be.
It's not really random, it has full meaning In the 48 beats case,
you can see that this entire set of addresses is full so we have
nine beats nine beats all all the way around,
there's nothing less than that.
So this is how 64-bit address translation works today and obviously there is
an overhead here for accessing all these data structures here in order just
to figure out where to actually make the access.
And again, this brings me back to the translation.
Look aside Buffer Cache, which is super important.
This case to make these things faster when you
access similar or close by and memory